The programmable nature of a programmable logic device (PLD), such as for example a field programmable gate array (FPGA) or a complex programmable logic device (CPLD), allows developers to allocate (e.g., during design and test phases) a portion of the PLD's logic and memory resources to debug intellectual property (IP) cores (e.g., soft IP cores or other types of user-defined logic implementations) that have also been programmed into the PLD. For example, a complete logic analyzer system may be programmed as a soft IP core into the PLD, which may then be used to debug other soft IP cores in the same PLD. This approach has the advantage of being able to probe many internal signals, while using fewer PLD input/output (I/O) pins than would be used by employing only an external logic analyzer device, and in some applications, it may be possible to eliminate the need for expensive stand-alone logic analyzers altogether.
As an example, a user of a PLD-implemented logic analyzer should be able to enter trigger expressions that determine when the logic analyzer begins capturing data. From a user's perspective the entry method should be straightforward and intuitive while also allowing arbitrarily complex trigger expressions to be entered. Furthermore, the logic analyzer should be able to accurately capture the user's trigger expression and implement it in software and/or hardware.
In general, conventional approaches generate logic analyzer IP cores to be loaded into the PLD along with user-defined IP, with software running externally to the PLD to configure the logic analyzer IP core, read the captured data, and display for a user. However, conventional approaches generally fail to provide state capability, fail to provide flexibility in combining signal conditions to achieve a desired logic analyzer result, and/or provide methods that are difficult for a user to enter complex trigger expressions.
As a result, there is a need for providing improved techniques for implementing a logic analyzer within a programmable logic device.